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160 Single-crystal field-effect transistors based on copper phthalocyanine
Author(s): R. Zeis, T. Siegrist, Ch. Kloc (Affiliation: Lucent Technol., Bell Labs., Murray Hill, NJ, USA)
Journal: Appl. Phys. Lett. (USA), vol.86, no.2, p.22103-1-3 (10 Jan. 2005)
Publisher: AIP, USA
Language: English
ISSN: 0003-6951, Full text
Document type: Journal article
Abstract: Copper phthalocyanine (Cu-Pc) single crystals weregrown by physical vapor transport and field-effect transistors(FETs) on the surface of these crystals were prepared. TheseFETs function as p-channel accumulation-mode devices.Charge carrier mobilities of up to 1 cm2/V s combined with alow field-effect threshold were obtained. These remarkableFET characteristics, along with the highly stable chemicalnature of Cu-Pc, make it an attractive candidate for deviceapplications (15 refs.)
Inspec No.: 8247186
161 Finite-element study of strain distribution in transistor with silicon-germanium source and drain regions
Author(s): Yee-Chia Yeo (Affiliation: Dept. of Electr. & Comput. Eng., Nat. Univ. of Singapore, Singapore), Jisong Sun
Journal: Appl. Phys. Lett. (USA), vol.86, no.2, p.23103-1-3 (10 Jan. 2005)
Publisher: AIP, USA
Language: English
ISSN: 0003-6951, Full text
Document type: Journal article
Abstract: The strain field in the silicon channel of a metaloxide-semiconductor transistor with silicon-germanium (Si1-yGey) source and drain regions was evaluated using a finiteelementmethod. The physical origin of the vertical and lateralstrain components in the transistor channel region wasexplained. The magnitude and distribution of the straincomponents, and their dependence on device designparameters such as the spacing L between the Si1-yGeystressors and the Ge mole fraction y in the stressors wereinvestigated. Reducing the interstressor spacing L orincreasing the Ge mole fraction y in the stressors increasesthe magnitude of the vertical tensile strain and the lateralcompressive strain in the portion of the channel region wherethe inversion charge resides. This is beneficial for improvingthe hole mobility in p-channel metal-oxide-semiconductortransistors (13 refs.)
Inspec No.: 8247210
162 Observation of trapping defects in 4H-silicon carbide metal-oxide-semiconductor field-effect transistors by spin-dependent recombination
Author(s): D.J. Meyer, P.M. Lenahan (Affiliation: Pennsylvania State Univ., University Park, PA, USA), A.J. Lelis
Journal: Appl. Phys. Lett. (USA), vol.86, no.2, p.23503-1-3 (10 Jan. 2005)
Publisher: AIP, USA
Language: English
ISSN: 0003-6951, Full text
Document type: Journal article
Abstract: We utilize a highly sensitive electron spin resonancetechnique called spin-dependent recombination to observedeep level dangling bond centers at and very near the SiC/SiO2 interface in fully processed n-channel 4H-SiC lateralmetal-oxide-semiconductor field-effect transistors. The axiallysymmetric g tensor of the largest signal strongly suggests thatthe responsible defect is a dangling bond center with thedangling bond orbital pointing along the crystalline c axis (26refs.)
Inspec No.: 8247223
163 OI-ELA poly-Si TFTs for eliminating residual source/drain junction defects
Author(s): Woo-Jin Nam, Kee-Chan Park, Sang-Hoon Jung, Min-Koo Han (Affiliation: Sch. of Electr. Eng., Seoul Nat. Univ., South Korea)
Journal: Electrochem. Solid-State Lett. (USA), vol.8, no.2, p. G41-3 (Feb. 2005)
Publisher: Electrochem. Soc, USA
Language: English
ISSN: 1099-0062, Full text
Document type: Journal article
Abstract: Residual ion doping damage near the source/drainjunctions of excimer laser annealed (ELA) polycrystallinesilicon thin-film transistors, caused by incomplete annealingnear the source/drain junction due to laser beam diffraction atthe gate edge, was successfully eliminated by a new methodcalled oblique-incidence ELA (OI-ELA). The laser beam fordopant-activation was irradiated obliquely so that the problemof incomplete annealing, due to diffraction at the gate edges,was eliminated. OI-ELA poly-Si TFTs have considerablyimproved electrical characteristics compared with conventionalELA poly-Si TFTs, including such properties as on-current,field effect mobility, and hot-carrier stress stability (6 refs.)
Inspec No.: 8249233
164 High-voltage normally off GaN MOSFETs on sapphire substrates
Author(s): K. Matocha (Affiliation: Semicond. Technol. Lab., GE Global Res., Niskayuna, NY, USA), T.P. Chow, R.J. Gutmann
Journal: IEEE Trans. Electron Devices (USA), vol.52, no.1, p.6-10 (Jan. 2005)
Publisher: IEEE, USA
Language: English
ISSN: 0018-9383, Full text
Document type: Journal article
Abstract: Gallium nitride self-aligned MOSFETs werefabricated using low-pressure chemical vapor-depositedsilicon dioxide as the gate dielectric and polysilicon as thegate material. Silicon was implanted into an unintentionallydoped GaN layer using the polysilicon gate to define thesource and drain regions, with implant activation at 1100°C for5 min in nitrogen. The GaN MOSFETs have a low gateleakage current of less than 50 pA for circular devices with W/L=800/128 ìm. Devices are normally off with a thresholdvoltage of +2.7 V and a field-effect mobility of 45 cm2/Vs atroom temperature. The minimum on-resistance measured is1.9 mÙ·cm2 with a gate voltage of 34 V (W/L=800/2 ìm).High-voltage lateral devices had a breakdown voltage of 700V with gate-drain spacing of 9 ìm (80 V/ìm), showing thefeasibility of self-aligned GaN MOSFETs for high-voltageintegrated circuits (20 refs.)
Inspec No.: 8249836
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