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195 Fabrication of a submicron source-drain gap for p-i-p field effect transistors using epitaxial diamond layers
Author(s): N. Kawakami, Y. Yokota, T. Tachibana, K. Hayashi, K. Inoue, K. Kobashi (Affiliation: Electron. Res. Laboratory, Kobe Steel Ltd., Japan)
Conference: Ninth International Conference on New Diamond Science and Technology, Tokyo, Japan
Conference Date: 26-29 March 2004
Journal: Diam. Relat. Mater. (Netherlands), vol.13, no.11-12, p.1939-43 (Nov.-Dec. 2004)
Publisher: Elsevier, Netherlands
Language: English
ISSN: 0925-9635, Full text
Document type: Conference paper in journal
Abstract: A p-i-p diamond field effect transistors (FETs), whichconsist of an epitaxial channel with submicron length, arefabricated. Two different fabrication processes to make p-i-pFETs are demonstrated, depending on how heavily B-dopeddiamond layers for source and drain are formed: ionimplantation and selective deposition. The p-i-p FET isoperated by the modulation of space charge limited currentand featured a transconductance up to 9.1 mS/mm (10 refs.)
Inspec No.: 8249690
196 Memory effects of carbon nanotube-based field effect transistors
Author(s): D.J. Yang, Qing Zhang, S.G. Wang (Affiliation: Clean Room & Characterization Lab., Microelectron. Centre, Nanyang Technol. Univ., Singapore ), G.F. Zhong
Conference: Ninth International Conference on New Diamond Science and Technology, Tokyo, Japan
Conference Date: 26-29 March 2004
Journal: Diam. Relat. Mater. (Netherlands), vol.13, no.11-12, p.1967-70 (Nov.-Dec. 2004)
Publisher: Elsevier, Netherlands
Language: English
ISSN: 0925-9635, Full text
Document type: Conference paper in journal
Abstract: In this paper, we report the study on the non-volatilememory effects of carbon nanotube-based field effecttransistors (CNTFETs), in which semiconducting single-wallcarbon nanotubes (SWNTs) bridge the gold electrodes andthe doped silicon substrate acts as the back gate. We find thatour CNTFETs exhibit good performance with on/off ratio ofmore than 104 and they also show strong memory effects.Hysteretic behaviors of the drain current as a function of thegate voltage are clearly observed at room temperature. Thethreshold voltage shift increases with increasing the sweepingrange of the gate voltage. The CNTFET memory effects showgood charge retention capability with the data storage time ofaround 7 days at ambient condition. Besides, the thresholdvoltage shift of the as-prepared CNTFETs is found todecrease with time and saturate after around 3 days. Waterand alcohol molecules adsorbed on the carbon nanotube aresuggested to be the origin of the phenomena. It is alsoobserved that the threshold voltage shift in "top-contact"structures is larger than those in "bottom-contact" structures atthe same gate voltage sweeping range (17 refs.)
Inspec No.: 8249696
197 Transport properties of a quantum dot based optically gated field-effect transistor
Author(s): M.A. Rowe, M. Su, R.P. Mirin (Affiliation: Nat. Inst. of Stand. & Technol., Boulder, CO, USA)
Editor(s): A.A.Sawchuk
Conference: Conference on Lasers and Electro-Optics (CLEO), San Francisco, CA, USA
Conference Date: 16-21 May 2004
Sponsor(s): APS; IEEE; Opt. Soc. of America
Publication: Conference on Lasers and Electro-Optics (CLEO)
Publisher: IEEE, USA, 2004
Language: English Page: 1 pp. vol.2
Document type: Conference paper
Abstract: We demonstrate an optically modulated field-effect transistor. Such a device has a possible application as a fast, flexible, and efficient single-photon detector (5 refs.)
Inspec No.: 8254862
198 Enhancement and depletion-mode pHEMT using 6 inch GaAs cost-effective production process
Author(s): Y.Y. Hsieh, T. Hwang, T.J. Yeh, C.G. Yuan, C.J. Chen, P. Yeh, J.H. Hwang, C.H. Chen, C.S. Wu (Affiliation: WIN Semicond. Corp., Tao Yuan Shien, Taiwan)
Conference: IEEE Compound Semiconductor Integrated Circuit Symposium. 2004 IEEE CISC Symposium, Monterey, CA, USA
Conference Date: 24-27 Oct. 2004
Sponsor(s): IEEE Electron Devices Soc
Publication: IEEE Compound Semiconductor Integrated Circuit Symposium. 2004 IEEE CISC Symposium (IEEE Cat. No.04CH37591)
Publisher: IEEE, USA, 2004
Language: English
ISBN: 0 7803 8616 7 Page: 111-14
Document type: Conference paper
Abstract: A cost effective enhancement/depletion modepHEMT MMIC process on 6-inch GaAs wafer is demonstratedby using 0.5ìm gate-length optical stepper pHEMTtechnology. E-mode and D-mode gates are depositedsimultaneously in this process simplification. The E-modepHEMT exhibits a pinch-off voltage of +0.22V (defined at0.1mA/mm), and a maximum extrinsic transconductance of400mS/mm at room temperature. The off-state current of Emodedevice is typically 0.15ìA/mm at Vgs =0V and Vds=3V.This current is extreme low and is suitable for high densitydigital circuits with minimized power consumption. On theother hand, a pinch-off voltage of -0.75V and atransconductance of 370mS/mm has been measured for DmodepHEMT. Due to excellent DC/RF characteristics andgood uniformity of E/D pHEMTs from optimized optical gatelithography and front-side process, the D-mode switch and Emodedigital control circuit constitute a monolithic solution toRF control circuits in WLAN and cell phone applications (3refs.)
Inspec No.: 8256039
199 E-/D-pHEMT technology for wireless components
Author(s): W.A. Wohlmuth, W. Liebl, V. Juneja, R. Hallgren (Affiliation: TriQuint Semicond., USA), W. Struble, D. Farias, P. Litzenberg, O. Berger
Conference: IEEE Compound Semiconductor Integrated Circuit Symposium. 2004 IEEE CISC Symposium, Monterey, CA, USA
Conference Date: 24-27 Oct. 2004
Sponsor(s): IEEE Electron Devices Soc
Publication: IEEE Compound Semiconductor Integrated Circuit Symposium. 2004 IEEE CISC Symposium (IEEE Cat. No.04CH37591)
Publisher: IEEE, USA, 2004
Language: English
ISBN: 0 7803 8616 7 Page: 115-18
Document type: Conference paper
Abstract: A pseudomorphic high-electron mobility transistor(pHEMT) technology for highly integrated wirelesscomponents is presented. The technology utilizes 0.5-ìm gatelength, double recess enhancement- and depletion-modeGaAs/AlGaAs/InGaAs transistors. The nominal E-mode pinch-off voltage is +350 mV with IMAX and IDSS of 290 and 0.0005mA/mm, respectively, transconductance of 550 mS/mm, onresistanceof 2.5 ohm·mm, Ft of 30 GHz, Fmax > 100 GHz anddrain-gate breakdown voltage in excess of 15 V. The nominalD-mode pinch-off is -800 mV with IMAX and IDSS of 500 and200 mA/mm, respectively, transconductance of 350 mS/mm,on-resistance of 1.5 ohm·mm, off-capacitance of 0.3 pF/mm,Ft of 25 GHz, F max of 90 GHz and drain-gate breakdownvoltage in excess of 17 V. This technology enables theintegration of ultra-linear high-power amplifiers that are highlyefficient, low-noise amplifiers, high-power and very linearantenna switches, baluns and filters, and digital logic functionsas well as power control devices (5 refs.)
Inspec No.: 8256040
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