PROCESS OVERVIEW The standard 75V analog bipolar process
is specifically designed to satisfy the requirements of matched
pair NPN transistors. The process is a complete BJT process (bipolar
juncton isolated transistor process). The degree of matching of
various device characteristics are collector current, temperature
and layout design dependent. Protection diodes and biasing resistors
may be also integrated for demanding custom applications. The 75V
analog bipolar process for matched pair NPN transistors employs
N type silicon epitaxial layer on P type silicon substrate.
In the standard process up to 8 masks are used: - buried layer (sub
collector), isolation, base, emitter, contact mask, thin film resistor
mask, metal mask, pad mask. The devices available are vertical NPN
transistors, TaN2 - tantalum nitride thin film resistors.
PROCESS OPTIONS are available with the standard 75V
analog bipolar process for high voltage IC. Process options-enhancements
are added to increase the integrated circuit designer's flexibility
in designing with HTE Labs analog bipolar process. Optional
devices available are as follows: P JFET (p channel junction
field effect transistor ), EPI N JFET (n channel silicon
epitaxial junction field effect transistor ) , Schottky diodes,Varactor
diodes, PIN diodes,Zenner diodes, laser trim able NiCr (nickel chrome
resistors) , TaN2 ( tantalum nitride resistors ) or SiCr ( silicon
chrome resistors ) sputtered thin film resistors. Sheet
resistance for the integrated thin film resistors is offered
in the widest range from 1ohm/square to 100Kohms/square while
the temperature coefficient of resistance is between ± 25
ppm/°C to ± 500ppm/°C.
For metal interconnections HTE Labs process employs up to two layers
of metallization, TiW/Au (standard metallization). The interlayer
dielectric is 1m m SiO2 while the passivation is Si3N4
or SiO2. Minimum contact size is 3mm x 3mm while the
metal pitch is 10m m. For flip chip, chip on board and chip scale
packaging applications, Gold bumps or solder bumps are available
process options. The 75V custom analog bipolar
process employs up to 12 masking layers for all features to be included.What
sets HTE Labs apart are couple main process options and capabilities
that are not typically acceptable or handled by large wafer foundries:
Custom developed processes HTE Labs has the engineering resources
and processing capabilities to develop custom processes to fit customer's
specific applications. This capability is offered to customers on
a contract base only.
1)- High stability thin film resistors with sheet resistance
as high as 100K ohms / square. The matching of the as deposited
thin film resistors is excellent with ought expensive laser trim.
The absolute values of resistors are within ± 5% across
the wafer and from wafer to wafer. For high speed RF IC process
applications, thin film resistors are best suited due to their very
low capacitance and low noise.
2)- High reliability gold metal interconnections is
a standard process feature specifically designed for hybrid circuits
applications, chip on board applications and sensors that need to
withstand corrosive environment where aluminum or copper metallization
are not a suitable choices.
3)- MEMS smart sensor integration KOH anisotropic etch,
deep RIE etch, LPCVD polysilicon and front to back mask alignment
are few process enhancements that are needed in developing and manufacturing
of integrated smart pressure sensors, accelerometers and other as
4)- Optoelectronic integrated circuits Photo transistors,
photodiodes and low capacitance high speed PIN diodes, when integrated
with the bipolar process, allow increased flexibility to design
and manufacturing of fiber optic amplifiers, optocouplers or optical
Analog Bipolar process - 4" wafer
foundry services At this time HTE Labs offers only 4"
wafer fabrication for the analog bipolar wafer foundry services.
HTE Labs wafer fab specializes in prototypes and small runs
of standard and custom developed analog bipolar processes. Customer's
own tooling can be used in most of the cases provided that design
rules are compatible with current processes. For more information
or a request for quote, please contact HTE Labs now, preferably
in writing by fax or by e-mail: HERE